Main characteristics

  • The CPU host of H series updated platform, took ARM+FPGA architecture, and had running speed increases more than 10 times;
  • Supports 8-channel duplex high-speed (200KHz) pulse input, supports 8-channel duplex high-speed (200KHz) pulse output;
  • Supports linear interpolation, arc interpolation, synchronizing pulse outputs, absolute address, relative address;
  • Adopts detachable terminal wiring, and it adds rechargeable battery which is used to keep real-time clock;
  • The control points, program capacity and RAM component count has increased greatly;
  • Modifies command algorithm, and adds new instructions;
  • Supports communication format of N,8,1 RTU, and baud rate 115200;
  • Users can record and search system fault by SV817~SV832;
  • Support Ethernet port and 5 other RS232/RS485 communication ports working simultaneously, support N:N network type.

Technical characteristics

Ethernet Model Model Specification Dimension WxHxD
24V DC 220V AC 24V DC 220V AC DI DO Pulse Input Pulse Output Communication Max Exp.
H16S0R-e H16S2R-e H16S0R H16S2R 8 8 Reley 4 Channels A/B phase (8 points) 200KHz   RS232+RS485, Max 5 ports 7 plc 9393×95×82mm
H16S0T-e H16S2T-e H16S0T H16S2T 8 8 Transistor NPN 4 Channels A/B phase (8 points) 200KHz 4 Channels A/B phase (8 points) 200KHz RS232+RS485, Max 5 ports 7
H16S0P-e H16S2P-e H16S0P H16S2P 8 8 Transistor PNP 4 Channels A/B phase (8 points) 200KHz 4 Channels A/B phase (8 points) 200KHz RS232+RS485, Max 5 ports 7
H24S0R-e H24S2R-e H24S0R H24S2R 12 12 Reley 4 Channels A/B phase (8 points) 200KHz   RS232+RS485, Max 5 ports 7
H24S0T-e H24S2T-e H24S0T H24S2T 12 12 Transistor NPN 6 Channels A/B phase (12 points) 200KHz 6 Channels A/B phase (12 points) 200KHz RS232+RS485, Max 5 ports 7
H24S0P-e H24S2P-e H24S0P H24S2P 12 12 Transistor PNP 6 Channels A/B phase (12 points) 200KHz 6 Channels A/B phase (12 points) 200KHz RS232+RS485, Max 5 ports 7
H32S0R-e H32S2R-e H32S0R H32S2R 16 16 Reley 4 Channels A/B phase (8 points) 200KHz   RS232+RS485, Max 5 ports 7 plc 131131×95×82mm
H32S0T-e H32S2T-e H32S0T H32S2T 16 16 Transistor NPN 6 Channels A/B phase (12 points) 200KHz 6 Channels A/B phase (12 points) 200KHz RS232+RS485, Max 5 ports 7
H32S0P-e H32S2P-e H32S0P H32S2P 16 16 Transistor PNP 6 Channels A/B phase (12 points) 200KHz 6 Channels A/B phase (12 points) 200KHz RS232+RS485, Max 5 ports 7
H40S0R-e H40S2R-e H40S0R H40S2R 20 20 Reley 4 Channels A/B phase (8 points) 200KHz   RS232+RS485, Max 5 ports 7
H40S0T-e H40S2T-e H40S0T H40S2T 20 20 Transistor NPN 8 Channels A/B phase (16 points) 200KHz 8 Channels A/B phase (16 points) 200KHz RS232+RS485, Max 5 ports 7
H40S0P-e H40S2P-e H40S0P H40S2P 20 20 Transistor PNP 8 Channels A/B phase (16 points) 200KHz 8 Channels A/B phase (16 points) 200KHz RS232+RS485, Max 5 ports 7
H60S0R-e H60S2R-e H60S0R H60S2R 36 24 Reley 4 Channels A/B phase (8 points) 200KHz   RS232+RS485, Max 5 ports 7 plc 177177×95×82mm
H60S0T-e H60S2T-e H60S0T H60S2T 36 24 Transistor NPN 8 Channels A/B phase (16 points) 200KHz 8 Channels A/B phase (16 points) 200KHz RS232+RS485, Max 5 ports 7
H60S0P-e H60S2P-e H60S0P H60S2P 36 24 Transistor PNP 8 Channels A/B phase (16 points) 200KHz 8 Channels A/B phase (16 points) 200KHz RS232+RS485, Max 5 ports 7

plc h series diagram